139 Infos zu Iuliana Bacivarov

4 Aktuelle Nachrichten

DASIP : Conference on Design and Architectures for Signal and Image Processing

Iuliana Bacivarov ETH Zurich, CH Shuvra Bhattacharyya University of Maryland, USA Alain Darte ENS Lyon, FR Koen de Bosschere University of Gent, BE › servlet

7  Bilder zu Iuliana Bacivarov

13 Profile in Sozialen Netzwerken

View Iuliana Bacivarov, Ph.D.'s profile on LinkedIn, the world's largest professional community. Iuliana has 5 jobs listed on their profile. See the complete profile ...

Iuliana Bacivarov, Ph.D.s berufliches Profil anzeigen LinkedIn ist das weltweit größte professionelle Netzwerk, das Fach- und Führungskräften wie Iuliana ...

1 Hobbys & Interessen

— Iuliana Bacivarov, AdaPNet Runtime System: Adapting Process Networks to Resource. Variations. CHANGE Workshop co-located with Parallel and ... › projects › cnect › deliverables

1 Firmen-Beteiligungen

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1 Business-Profile

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21 Bücher zum Namen

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Iuliana Bacivarov, Wolfgang Haid, Kai Huang, and Lothar Thiele. Dynamic Dataflow Graphs Shuvra S. Bhattacharyya, Ed F. Deprettere, and Bart D. Theelen. › dms › ilmenau › toc

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· Europ.) (French Edition). by Iuliana Bacivarov. Book condition: Good. Book Description Good. Ships with Tracking Number!

10 Dokumente

Authors: Pier Stanislao Paolucci, Iuliana Bacivarov, Gert Goossens, Rainer Leupers, Frédéric Rousseau, Christoph Schumacher, Lothar Thiele, ...

Embedding Formal Performance Analysis into the Design Cycle of MPSoCs for Real-Time Streaming Applications KAI HUANG, WOLFGANG HAID, IULIANA BACIVAROV, MATTHIAS KELLER, and LOTHAR THIELE, ETH Zurich Modern real-time streaming applications are increasingly implemented on multiprocessor systems-on-chip (MPSoC).

Iuliana Bacivarov. ETH Zurich, CH. Shuvra Bhattacharyya. University of Maryland , USA. Alain Darte. ENS Lyon, FR. Koen de Bosschere. University of Gent, BE.

Context and motivation how to design a system with. Map2MPSoC/SCOPES 2012: distributed application layer. Iuliana Bacivarov g y many cores and dynamic ...

24 Wissenschaftliche Publikationen

von PS Paolucci · · Zitiert von: 19 — Iuliana Bacivarov received the electrical engineering degree in from the National Polytechnic Institute of Bucharest, Romania. › pii

List of computer science publications by Iuliana Bacivarov

Iuliana Bacivarov, Aimen Bouchhima, Sungjoo Yoo, Ahmed Amine Jerraya: ChronoSym: a new approach for fast and accurate SoC cosimulation. IJES : 2005: …

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6 Allgemeine Veröffentlichungen

— Prof. Dr. Lothar Thiele. Monica Fricker. Dr. Iuliana Bacivarov. Dr. Jan Beutel. Dr. Kai Lampka › view

von C Fabre · · Zitiert von: 3 — Iuliana Bacivarov,; Ananda Basu,; Martino Ruggiero,; David Atienza,; Éric Flamand,; Jean-Pierre ... › chapter

1-10 [doi] · AdaPNet: Adapting process networks in response to resource variationsLars Schor, Iuliana Bacivarov, Hoeseok Yang, Lothar Thiele. › cases-2014

(20) (26); Iuliana Bacivarov · .ethz.ch (22); Ananda Basu · (21) (26); Martino Ruggiero ·  ...

1 Meinungen & Artikel

— Iuliana Bacivarov, Wolfgang Haid, Kai Huang, Lothar Thiele “Methods and Tools for Mapping Process Networks onto Multi-Processor ... › wiki › Ref...

49 Webfunde aus dem Netz

View Iuliana Bacivarov's professional profile on LinkedIn. LinkedIn is the world's largest business network, helping professionals like Iuliana Bacivarov discover ...

› citations

· Link to the summary of first three years of activity, Pier Stanislao Paolucci, Iuliana Bacivarov, Gert Goossens, Rainer Leupers, Frédéric ...

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Devendra Rai, Lars Schor, Nikolay Stoimenov, Iuliana Bacivarov, Lothar Thiele. Reliable and Efficient Execution of Multiple Streaming Applications on Intel’s SCC Processor. Intel’s Single-chip Cloud Computer (SCC) is a prototype architecture for on-chip many-core systems. By incorporating 48 cores into a single die, it provides unique ...

Iuliana Bacivarov, Wolfgang Haid, Kai Huang, Lothar Thiele. Intermediate representations for simulation and implementation. Simulation and implementation of DSP systems is often a challenge due to their complex dynamic behaviour and requirements on non functional properties. This chapter presents examples of high-level intermediate ...

This book constitutes the refereed proceedings of the 21st International Conference on Integrated Circuit and System Design, PATMOS 2011, held in

Aus dem eBook: Formal Methods for Components and Objects von Christian Fabre, Iuliana Bacivarov, Ananda Basu, Martino Ruggiero, David Atienza, Éric Flamand, …

von A Jerraya · · Zitiert von: 4 — ByAhmed Jerraya, Iuliana Bacivarov. BookElectronic Design Automation for IC System Design, Verification, and Testing. Click here to navigate to parent ... › edit

1 12 Synthese Eingebetteter Systeme Sommersemester Abbildung von Anwendungen: Optimierung mit DOL Michael Engel Informatik 12 TU Dortmund unter Verwendung von Foliensätzen von Prof. Lothar Thiele und Dr. Iuliana Bacivarov, ETH Zürich

EVALUATION DES PERFORMANCES POUR MPSOC de Iuliana Bacivarov - Livres français - commander la livre de la catégorie Technologie sans frais de port ...

Performance Evaluation Methods for Multiprocessor System-on-Chip Design book. Edited ByAhmed Jerraya, Iuliana Bacivarov. BookEDA for IC System Design, ...

A VIII-a Conferinţă Internaţională “Calitate şi Siguranţă în Funcţionare” – CCF 2002

Devendra Rai, Hoeseok Yang, Iuliana Bacivarov and Lothar Thiele. CODES+ISSS: A Traffic-Aware Adaptive Routing Algorithm on a Highly Reconfigurable ... › awards

Worst-Case Temperature Guarantees for Real-Time Applications on Multi-Core Systems by Lars Schor, Iuliana Bacivarov, Hoeseok Yang and Lothar Thiele.

— ... Piero Vicini (INFN); Management of process network dynamism in the distributed application layer, Iuliana Bacivarov (ETHZ) ... › castness

... POUR LES SYSTEMES EMBARQUES HETEROGENES, MULTIPROCESSEUR MONOPUCES - UNE APPROCHE AU NIVEAU SYSTEME. Iuliana Bacivarov - ISBN: › catalog

Olivera Jovanovic, Iuliana Bacivarov, Peter Marwedel and Lothar Thiele. MAMOT: Memory-Aware Mapping Optimization Tool for MPSoC Alexandre ...

Iuliana Bacivarov, Ahmed A. Jerraya, and Sungjoo Yoo "A fast and accurate validation technique for operating system in multi-processor system-on-chip design", ...